Make -fsched-pressure a more consistent win
We produce very poor code for one of the EEMBC colour-space conversion tests . The problem is that the first scheduling pass significantly increases register pressure in the conversion loop, leading to many spills.
There is an option, -fsched-pressure, that tries to make the scheduler take register pressure into account. It works as expected on this particular colour-conversion loop, but it produces worse code for other tests (including other EEMBC tests). The same variability in results has been seen on other architectures like s390 too.
Part of the problem is that if there are N available registers and N+M values live across (but not during) the loop, the scheduler enters a degenerate state in which reducing register pressure trumps everything else. This is wrong, though, because in such a situation, the register allocator will spill as many of those N+M registers as necessary in order for the inner loop to get a reasonable allocation. There are other problems too.
Status: Patch posted for comments:
Blueprint information
- Status:
- Complete
- Approver:
- Michael Hope
- Priority:
- High
- Drafter:
- Richard Sandiford
- Direction:
- Approved
- Assignee:
- Ulrich Weigand
- Definition:
- Approved
- Series goal:
- Accepted for 4.6
- Implementation:
-
Implemented
- Milestone target:
-
4.6-2012.03
- Started by
- Richard Sandiford
- Completed by
- Michael Hope
